/**
 @file ctc_asw_chip.h

 @author  Copyright (C) 2020 Centec Networks Inc.  All rights reserved.

 @date 2020-06-15

 @version v1.0

 The file define  CENTEC SDK  chip
 \p
This module support a variety of Ethernet network port interfaces: copper, fiber from 10M to 1Gb.
Port mac Ethernet related criterion standardized in IEEE 802.3, is a family of communication technologies for local area networks.
Devices communicating over Ethernet divide data streams into frames. Each frame contains addresses
(source and destination), payload, and error checking cyclical redundancy check (CRC).
\p
The SDK port module is a resource module, the port related APIs provide control over a significant number of port attributes.
Each port known to the API has certain abilities. Some normal abilities can be determined during the initialization of
the port module. For a given port, the overall capabilities for a port are determined by taking the least common
denominator of all the factors. These attributes can be set by the APIs provided. The gport in this module is global
physical port, not includes linkagg port.
\b
\pp
And for extend, the module provides APIs named ctc_port_set_property() and ctc_port_set_property_with_direction() to
set the other features, refer to the enum ctc_port_property_t.
\b
\S ctc_port.h:ctc_vlantag_ctl_t
\S ctc_port.h:ctc_port_speed_t
\S ctc_port.h:ctc_port_mac_type_t
\S ctc_port.h:ctc_frame_size_t
\S ctc_port.h:ctc_ipg_size_t
\S ctc_port.h:ctc_port_lbk_type_t
\S ctc_port.h:ctc_port_arp_action_type_t
\S ctc_port.h:ctc_port_dhcp_action_type_t
\S ctc_port.h:ctc_port_rpf_type_t
\S ctc_port.h:ctc_port_scl_key_type_t
\S ctc_port.h:ctc_port_vlan_domain_type_t
\S ctc_port.h:ctc_port_raw_packet_t
\S ctc_port.h:ctc_port_restriction_mode_t
\S ctc_port.h:ctc_port_pvlan_type_t
\S ctc_port.h:ctc_port_isolation_pkt_type_t
\S ctc_port.h:ctc_port_blocking_pkt_type_t
\S ctc_port.h:ctc_port_untag_pvid_type_t
\S ctc_port.h:ctc_port_property_t
\S ctc_port.h:ctc_port_direction_property_t
\S ctc_port.h:ctc_port_mac_prefix_type_t
\S ctc_port.h:ctc_port_igs_scl_hash_type_t
\S ctc_port.h:ctc_port_egs_scl_hash_type_t
\S ctc_port.h:ctc_port_igs_scl_tcam_type_t
\S ctc_port.h:ctc_port_scl_action_type_t

\S ctc_port.h:ctc_port_lbk_param_t
\S ctc_port.h:ctc_port_mac_postfix_t
\S ctc_port.h:ctc_port_link_status_t
\S ctc_port.h:ctc_port_restriction_t
\S ctc_port.h:ctc_port_fc_prop_t
\S ctc_port.h:ctc_port_scl_property_t
\S ctc_port.h:ctc_port_global_cfg_t
*/
#ifndef _CTC_ASW_PORT_H
#define _CTC_ASW_PORT_H
#ifdef __cplusplus
extern "C" {
#endif
/***************************************************************************
*
* Header Files
*
****************************************************************************/

#include "ctc_port.h"
#include "ctc_vlan.h"

/***************************************************************************
*
* Defines and Macros
*
****************************************************************************/

enum ctc_asw_port_internal_property_e
{
    CTC_PORT_INT_PROP_DEFAULT_PCP = 0,
    CTC_PORT_INT_PROP_DEFAULT_DEI = 1,
    CTC_PORT_INT_PROP_REPLACE_TAG_EN = 6,
    CTC_PORT_INT_PROP_QOS_POLICY,
    CTC_PORT_INT_PROP_REPLACE_DSCP_EN,
    CTC_PORT_INT_PROP_STMCTL_EN,
    CTC_PORT_INT_PROP_STMCTL_OFFSET,
    CTC_PORT_INT_PROP_INGRESS_POLICER_PTR,
    CTC_PORT_INT_PROP_SMAC_GRP_ID,
    CTC_PORT_INT_PROP_NUM
};
typedef enum ctc_asw_port_internal_property_e  ctc_asw_port_internal_property_t;
/***************************************************************************
*
*  Functions
*
****************************************************************************/
/**
 @brief Initialize port module

 @param[in] lchip  local chip id

 @param[in]  p_port_global_cfg  port global setting read from chip configure file

 @remark[TMA]    Initialize the port module and set default config.
            \p
            Default config:
            \p
             (1)Default VLAN for untagged packets is set to 1, refer to CTC_PORT_PROP_DEFAULT_VLAN;
             \p
             (2)Ingress VLAN Filtering is disabled, refer to CTC_PORT_DIR_PROP_VLAN_FILTER_EN;

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_init(uint8 lchip, void* p_port_global_cfg);

/**
 @brief De-Initialize port module

 @param[in] lchip    local chip id

 @remark[TMA]  User can de-initialize the port configuration

 @return CTC_E_XXX
*/
extern int32
ctc_asw_port_deinit(uint8 lchip);

/**
 @brief The function is to set stag tpid index

 @param[in] lchip    local chip id

 @param[in] gport global physical port

 @param[in] dir  flow direction, refer to ctc_direction_t

 @param[in] index stag tpid index, can be configured in ethernet ctl register

 @remark[TMA]  There are 4 index to select for stag tpid, when set stag tpid index to 3, the packet will be parser as untagged
          packet

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_set_stag_tpid_index(uint8 lchip, uint32 gport, ctc_direction_t dir, uint8 index);

/**
 @brief The function is to get stag tpid index

 @param[in] lchip    local chip id

 @param[in] gport global physical port

 @param[in] dir  flow direction, refer to ctc_direction_t

 @param[out] p_index stag tpid index, the index point to stag tpid value

 @remark[TMA]  Get stag tpid index

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_get_stag_tpid_index(uint8 lchip, uint32 gport, ctc_direction_t dir, uint8* p_index);
/**
 @brief  Set the isolation group of port or isolated id

 @param[in]  lchip_id    local chip id

 @param[in] p_port_isolation    restriction group parameter

 @remark[TMA]
    Set configuration info about restriction on port or isolation id.

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_set_isolation(uint8 lchip_id, ctc_port_isolation_t* p_port_isolation);

/**
 @brief  Get the isolation group of port or isolated id

 @param[in]  lchip_id    local chip id

 @param[out] p_port_isolation    restriction group info

 @remark[TMA]
    Get configuration info about restriction on port or isolation id.

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_get_isolation(uint8 lchip_id, ctc_port_isolation_t* p_port_isolation);

/**
 @brief Set port property

 @param[in] lchip    local chip id

 @param[in] gport        global physical port

 @param[in] port_prop    port property

 @param[in] value        port property value

 @remark[TMA]  The API provides a ability to control the various features on the port, refer to ctc_port_property_t

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_set_property(uint8 lchip, uint32 gport, ctc_port_property_t port_prop, uint32 value);

/**
 @brief Get port property

 @param[in] lchip    local chip id

 @param[in] gport        global physical port

 @param[in] port_prop    port property

 @param[out] p_value        port property value

 @remark[TMA]  Get the property value on the port

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_get_property(uint8 lchip, uint32 gport, ctc_port_property_t port_prop, uint32* p_value);

/**
 @brief Set port property with direction

 @param[in] lchip    local chip id

 @param[in] gport        global physical port

 @param[in] port_prop    port property

 @param[in] dir          direction

 @param[in] value        port property value

 @remark[TMA]  The API provides a ability to control the various features on the port with direction, refer to ctc_port_property_t

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_set_direction_property(uint8 lchip, uint32 gport, ctc_port_direction_property_t port_prop, ctc_direction_t dir, uint32 value);

/**
 @brief Get port property with direction

 @param[in] lchip    local chip id

 @param[in]  gport        global physical port

 @param[in]  port_prop    port property

 @param[in]  dir          direction

 @param[out] p_value      port property value

 @remark[TMA]  Get the property value on the port

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_get_direction_property(uint8 lchip, uint32 gport, ctc_port_direction_property_t port_prop, ctc_direction_t dir, uint32* p_value);
/**
 @brief Set scl property to gport

 @param[in] lchip    local chip id

 @param[in] gport  global physical port

 @param[in] prop   scl property

 @remark[TMA]  Set scl property on the port

 @return CTC_E_XXX
*/
extern int32
ctc_asw_port_set_scl_property(uint8 lchip, uint32 gport, ctc_port_scl_property_t* prop);

/**
 @brief Get scl property of gport

 @param[in] lchip    local chip id

 @param[in] gport  global physical port

 @param[out] prop   scl property

 @remark[TMA]  Get scl property on the port

 @return CTC_E_XXX
*/
extern int32
ctc_asw_port_get_scl_property(uint8 lchip, uint32 gport, ctc_port_scl_property_t* prop);

/**
 @brief The function is to set vlan range on the port

 @param[in] lchip    local chip id

 @param[in] gport global physical port

 @param[in] p_vrange_info vlan range info, refer to ctc_vlan_range_info_t

 @param[in] enable enable or disable vlan range

 @remark[TMA]  The vlan ID within a range can be mapped into a vlan, but it must enable the vlan range by the API at first

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_set_vlan_range(uint8 lchip, uint32 gport, ctc_vlan_range_info_t* p_vrange_info, bool enable);

/**
 @brief The function is to get vlan range on the port

 @param[in] lchip    local chip id

 @param[in] gport global physical port

 @param[in|out] p_vrange_info vlan range info, refer to ctc_vlan_range_info_t

 @param[out] p_enable enable or disable vlan range

 @remark[TMA]  Get vlan range enable/disable

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_get_vlan_range(uint8 lchip, uint32 gport, ctc_vlan_range_info_t* p_vrange_info, bool* p_enable);

/**
 @brief Set port interface mode

 @param[in] lchip    local chip id

 @param[in] gport        global physical port

 @param[in] if_mode      port interface mode

 @remark[TMA]  The API set port interface mode, refer to ctc_port_speed_t and ctc_port_if_type_t

 @return CTC_E_XXX
*/
extern int32
ctc_asw_port_set_interface_mode(uint8 lchip, uint32 gport, ctc_port_if_mode_t* if_mode);

/**
 @brief set port internal property

 @param[in] lchip    local chip id

 @param[in]  gport        global physical port

 @param[in]  port_prop    port internal property

 @param[out] p_value      port internal property value

 @remark[TMA]  Set the internal property value on the port

 @return CTC_E_XXX

*/
INTERNAL extern int32
_ctc_asw_port_set_internal_property(uint8 lchip, uint32 gport, ctc_asw_port_internal_property_t port_prop, uint32 value);

/**
 @brief get port internal property

 @param[in] lchip    local chip id

 @param[in]  gport        global physical port

 @param[in]  port_prop    port internal property

 @param[out] p_value      port internal property value

 @remark[TMA]  Get the internal property value on the port

 @return CTC_E_XXX

*/
INTERNAL extern int32
_ctc_asw_port_get_internal_property(uint8 lchip, uint32 gport, ctc_asw_port_internal_property_t port_prop, uint32* p_value);

/**
 @brief Set flow control of port

 @param[in] lchip    local chip id

 @param[in] p_fc_prop Point to flow control property

 @remark[TMA]  Enable/disable flow control or priority flow control

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_set_flow_ctl_en(uint8 lchip, ctc_port_fc_prop_t* p_fc_prop);

/**
 @brief Get flow control of port

 @param[in] lchip    local chip id

 @param[in|out] p_fc_prop point to flow control property

 @remark[TMA]  Get flow control or priority flow control enable/disable

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_get_flow_ctl_en(uint8 lchip, ctc_port_fc_prop_t* p_fc_prop);

/**
 @brief Set acl property

 @param[in] lchip   local chip id

 @param[in] gport   global physical port

 @param[in] p_prop    acl property

 @remark[TMA] Set acl property on the port

 @return CTC_E_XXX
*/
extern int32
ctc_asw_port_set_acl_property(uint8 lchip, uint32 gport, ctc_acl_property_t* p_prop);

/**
 @brief Get acl property of gport

 @param[in] lchip    local chip id

 @param[in] gport  global physical port

 @param[out] p_prop   acl property

 @remark[TMA]  Get acl property on the port

 @return CTC_E_XXX
*/
extern int32
ctc_asw_port_get_acl_property(uint8 lchip, uint32 gport, ctc_acl_property_t* p_prop);

/**
 @brief Get port mac link up status

 @param[in] lchip    local chip id

 @param[in]  gport    global port of the system

 @param[out] p_is_up  0 means not link up, 1 means link up

 @remark[TMA]  Get port mac link up status

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_get_mac_link_up(uint8 lchip, uint32 gport, bool* p_is_up);

/**
 @brief Set port phy property

 @param[in] lchip    local chip id

 @param[in] gport       global phyical port

 @param[in] port_prop  port property

 @param[in] p_value  phy property value

 @remark[TMA]  Set the port phy property on the port

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_set_phy_property(uint8 lchip, uint32 gport, ctc_port_property_t port_prop, void* p_value);

/**
 @brief Get port phy property

 @param[in] lchip    local chip id

 @param[in] gport       global phyical port

 @param[out] port_prop   get phy property
 
 @param[out] p_value   phy property value

 @remark[TMA]  Get the port phy property value on the port

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_get_phy_property(uint8 lchip, uint32 gport, ctc_port_property_t port_prop, void* p_value);

/**
 @brief Get port phy property

 @param[in] lchip    local chip id

 @param[in] gport       global phyical port

 @param[in] port_prop   set port restriction
 
 @remark[TMA]  Set the port restriction

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_set_restriction(uint8 lchip, uint32 gport, ctc_port_restriction_t* p_restriction);

/**
 @brief Get port phy property

 @param[in] lchip    local chip id

 @param[in] gport       global phyical port

 @param[out] port_prop   get port restriction
 
 @remark[TMA]  Get the port restriction

 @return CTC_E_XXX

*/
extern int32
ctc_asw_port_get_restriction(uint8 lchip, uint32 gport, ctc_port_restriction_t* p_restriction);


/**@} end of @defgroup   */
#ifdef __cplusplus
}
#endif

#endif

